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 DG401/403/405
Vishay Siliconix
Low-Power, High-Speed CMOS Analog Switches
DESCRIPTION
The DG401/403/405 monolithic analog switches were designed to provide precision, high performance switching of analog signals. Combining low power (0.35 W, typ) with high speed (tON: 75 ns, typ), the DG401 series is ideally suited for portable and battery powered industrial and military applications. Built on the Vishay Siliconix proprietary high-voltage silicon-gate process to achieve high voltage rating and superior switch on/off performance, break-before-make is guaranteed for the SPDT configurations. An epitaxial layer prevents latchup. Each switch conducts equally well in both directions when on, and blocks up to 30 V peak-to-peak when off. Onresistance is very flat over the full 15 V analog range, rivaling JFET performance without the inherent dynamic range limitations. The three devices in this series are differentiated by the type of switch action as shown in the functional block diagrams.
FEATURES
* * * * * * 44 V Supply Max Rating 15 V Analog Signal Range On-Resistance - rDS(on): 30 Low Leakage - ID(on): 40 pA Fast Switching - tON: 75 ns Ultra Low Power Requirements - PD: 0.35 W * TTL, CMOS Compatible * Single Supply Capability
Pb-free Available
RoHS*
COMPLIANT
BENEFITS
* Wide Dynamic Range * Break-Before-Make Switching Action * Simple Interfacing
APPLICATIONS
* * * * * * Audio and Video Switching Sample-and-Hold Circuits Battery Operation Test Equipment Communications Systems PBX, PABX
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG401 Dual-In-Line and SOIC
NC D1 NC NC NC NC NC NC D2 1 2 3 4 5 6 7 8 Top View 16 15 14 13 12 11 10 9 S1 IN1 VGND VL V+ IN2 S2 NC NC NC NC NC 4 5 6 7 8 9 NC 10 Key 3
DG401 LCC
D1 2 NC 1 S1 20 IN1 19 18 17 16 15 14 11 NC 12 S2 13 IN2 VGND NC VL V+
Two SPST Switches per Package
TRUTH TABLE
Logic 0 1 Logic "0" 0.8 V Logic "1" 2.4 V Switch OFF ON
D2
Top View
* Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 70049 S-71155-Rev. H, 11-Jun-07 www.vishay.com 1
DG401/403/405
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG403 Dual-In-Line and SOIC
D1 NC D3 S3 S4 D4 NC D2 1 2 3 4 5 6 7 8 Top View 16 S1 15 14 13 12 11 10 9 IN1 VGND VL V+ IN2 S2 S4 D4 S3 NC Key 4 5 6 7 8 9 10
DG403 LCC
NC D1 NC 3 2 1 S1 20 IN1 19 18 17 16 15 14 11 12 S2 13 IN2 VGND NC VL V+
D3
Two SPDT Switches per Package
TRUTH TABLE
Logic 0 1 Logic "0" 0.8 V Logic "1" 2.4 V SW1, SW2 OFF ON SW3, SW4 ON OFF
NC D2 NC
Top View
DG405 Dual-In-Line and SOIC
D1 NC D3 S3 S4 D4 NC D2 1 2 3 4 5 6 7 8 16 S1 15 14 13 12 11 10 9 IN1 VGND VL V+ IN2 S2 D3 S3 NC S4 D4 4 5 6 7 8 9 10 Key 3 2
DG405 LCC
NC D1 NC 1 S1 20 IN1 19 18 17 16 15 14 11 12 S2 13 IN2 VGND NC VL V+
Two DPST Switches per Package
TRUTH TABLE
Logic 0 1 Logic "0" 0.8 V Logic "1" 2.4 V Switch OFF ON
NC D2 NC Top View
Top View
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Document Number: 70049 S-71155-Rev. H, 11-Jun-07
DG401/403/405
Vishay Siliconix
ORDERING INFORMATION
Temp Range DG401 - 40 to 85 C DG403 16-Pin Plastic DIP - 40 to 85 C 16-Pin Narrow SOIC DG405 16-Pin Plastic DIP - 40 to 85 C 16-Pin Narrow SOIC DG405DJ DG405DJ-E3 DG405DY DG405DY-E3 DG405DY-T1 DG405DY-T1-E3 DG403DJ DG403DJ-E3 DG403DY DG403DY-E3 DG403DY-T1 DG403DY-T1-E3 16-Pin Plastic DIP DG401DJ DG401DJ-E3 Package Part Number
ABSOLUTE MAXIMUM RATINGS
Parameter V+ to VGND to VVL Digital Inputsa, VS, VD Current (Any Terminal) Continuous Current, S or D (Pulsed 1 ms, 10 % duty) Storage Temperature Power Dissipation (Package)b (DJ, DY Suffix) 16-Pin Plastic 16-Pin SOICd DIPc Limit 44 25 (GND - 0.3) to (V+) + 0.3 (V-) - 2 to (V+) + 2 or 30 mA, whichever occurs first 30 100 - 65 to 125 450 600 mW mA C V Unit
Notes: a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 6 mW/C above 75 C. d. Derate 7.6 mW/C above 75 C.
Document Number: 70049 S-71155-Rev. H, 11-Jun-07
www.vishay.com 3
DG401/403/405
Vishay Siliconix
SPECIFICATIONSa
Test Conditions Unless Specified V+ = 15 V, V- = - 15 V Parameter Analog Switch Analog Signal Rangee Drain-Source On-Resistance Drain-Source On-Resistance Symbol VANALOG rDS(on) rDS(on) IS(off) Switch Off Leakage Current ID(off) Channel On Leakage Current Digital Control Input Current VIN Low Input Current VIN High Dynamic Characteristics Turn-On Time Turn-Off Time Break-Before-Make Time Delay (DG403) Charge Injection Off Isolation Reject Ratio Channel-to-Channel Crosstalk Source Off Capacitance Drain Off Capacitance Channel On Capacitance Power Supplies Positive Supply Current Negative Supply Current Logic Supply Current Ground Current I+ IIL IGND V+ = 16.5 V, V- = - 16.5 V VIN = 0 or 5 V Room Full Room Full Room Full Room Full 0.01 - 0.01 0.01 - 0.01 -1 -5 -1 -5 1 5 1 5 A tON tOFF tD Q OIRR XTALK CS(off) CD(off) CD, CS(on) f = 1 MHz, VS = 0 V RL = 300 , CL = 35 pF See Figure 2 RL = 300 , CL = 35 pF CL = 10 nF Vgen = 0 V, Rgen = 0 RL = 100 , CL = 5 pF f = 1 MHz Room Room Room Room Room Room Room Room Room 75 30 35 60 72 90 12 12 39 pF 5 pC dB 150 100 ns IIL IIH VIN under test = 0.8 V All Other = 2.4 V VIN under test = 2.4 V All Other = 0.8 V Full Full 0.005 0.005 -1 -1 1 A 1 ID(on) IS = - 10 mA, VD = 10 V V+ = 13.5 V, V- = - 13.5 V IS = - 10 mA, VD = 5 V, 0 V V+ = 16.5 V, V- = - 16.5 V V+ = 16.5 V, V- = - 16.5 V VD = 15.5 V, VS = 15.5 V V+ = 16.5 V, V- = - 16.5 V VS = VD = 15.5 V VL = 5 V, VIN = 2.4 V, 0.8 Vf Tempb Full Room Full Room Full Room Hot Room Hot Room Hot 30 3 - 0.01 - 0.01 - 0.04 - 0.5 -5 - 0.5 -5 -1 - 10 Typc D Suffix - 40 to 85 C Mind - 15 Maxd 15 45 55 3 5 0.5 5 0.5 5 1 10 Unit V
nA
Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25 C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
www.vishay.com 4
Document Number: 70049 S-71155-Rev. H, 11-Jun-07
DG401/403/405
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
7 6 5 V TH (V) 4 3 2 1 0 0 2 4 6 8 10 12 14 16 18 V+ = 15 V V- = -15 V SW1, 2 2.5 VL = 7 V SW3, 4 2 1.5 1 0.5 0 5 10 15 20 (V+) 25 30 35 VL - Logic Supply (V) VL = 5 V 3.5 3
V T (V)
Input Switching Threshold vs. Logic Supply Voltage
50 r DS(on) - Drain-Source On-Resistance ( ) 45 40 35 30 25 20 15 10 5 0 - 15.0 - 40 C 85 C 25 C 0 C r DS(on) - Drain-Source On-Resistance ( ) V+ = 15 V, V- = - 15 V VL = 5 V 60
Input Switching Threshold vs. Supply Voltages
TA = 25 C 50 6V 40 10 V 12 V 15 V 20 V
30
22 V 20
10 - 10.0 - 5.0 0.0 5.0 10.0 15.0 - 25 - 15 -5 5 15 26
VD - Drain Voltage (V)
VD - Drain Voltage (V)
rDS(on) vs. VD and Temperature
100 r DS(on) - Drain-Source On-Resistance ( ) TA = 25 C 90 7.5 V 80 70 Q (pC) 60 50 15 V 40 30 20 10 0 5 10 15 20 25 20 V 22 V - 10 - 20 - 30 - 15 10 V 12 V 20 10 0 40 30 50
rDS(on) vs. VD and Power Supply Voltage
CL = 10 nF
1 nF
100 pF
- 10
-5
0
5
10
15
VD - Drain Voltage (V)
VS - Source Voltage (V )
rDS(on) vs. VD and Power Supply Voltage (V- = 0 V)
Charge Injection vs. Analog Voltage
Document Number: 70049 S-71155-Rev. H, 11-Jun-07
www.vishay.com 5
DG401/403/405
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
1000p V+ = 15 V V- = -15 V VL = 5 V VD = 14 V 100p I D (off) I S, I D (pA) 40 Id (off) 20 Id (on) Is (off) 0 - 20 - 40 - 60 Id (off) - 80 1p - 40 - 20 0 20 40 60 80 Temperature (C) - 100 - 15.0 - 10.0 - 5.0 0.0 5.0 10.0 15.0 VD or V S - Drain or Source Voltage (V) Is (off)
Id (on) 10p
Leakage Current vs. Temperature
100 nA V+ = 15 V V- = - 15 V VL = 5 V 1 nA t ON , t OFF (ns) IL I+, I-, IL (A) 80 II+ 120
Leakage Current vs. Analog Voltage
100
V+ = 15 V V- = - 15 V VL = 5 V VS = 10 V VS = - 10 V VS = 10 V
tON
100 pA
60
tOFF
40
10 pA 20 VS = -10 V 1 pA - 40 - 20 0 20 40 60 80 100 0 - 40 - 20 0 TA - Temperature (C) 20 40 60 TA - Temperature (C) 80 100
Supply Current vs. Temperature
180 160 140 t ON , t OFF (ns) t ON , t OFF (ns) 120 100 80 tON 60 40 20 0 0 5 10 15 20 25 V+, V- Positive and Negative Supplies (V) VS = 5 V tOFF VS = - 5 V VS = - 5 V VS = 5 V 300 270 240 210 180 150 120 90 60
Switching Time vs. Temperature*
0V VS = 5 V
-5V - 15 V
- 15 V -5V 0V 0 5 10 15 20
tON tOFF
30 0
25
V+ - Positive Supply (V)
Switching Time vs. Power Supply Voltage*
Switching Time vs. Positive Supply Voltage*
*Refer to Figure 2 for test conditions.
www.vishay.com 6 Document Number: 70049 S-71155-Rev. H, 11-Jun-07
DG401/403/405
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
100 mA 10 mA 1 mA Supply Current (A) 100 A 10 A 1 A 100 nA 10 nA 10 100 1K 10K 100K 1M 10M
Frequency (Hz)
Supply Current vs. Switching Frequency
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+ S VL V- VIN Level Shift/ Drive V+ GND D V-
Figure 1.
Document Number: 70049 S-71155-Rev. H, 11-Jun-07
www.vishay.com 7
DG401/403/405
Vishay Siliconix
TEST CIRCUITS
VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform.
+5V VL 10 V S IN GND
+ 15 V V+ D VO RL 1 k CL 35 pF
Logic Input Switch Input*
50 % 0V tOFF VS 90 %
tf < 20 ns tf < 20 ns
VO
V-
Switch Output Switch Input*
0V tON VO -V S 90 %
- 15 V CL (includes fixture and stray capacitance) VO = V S RL RL + rDS(on)
* VS = 10 V for t ON, V S = - 10 V for tOFF Note: Logic input waveform is inverted for switches that have the opposite logic sense control
Figure 2. Switching Time
+5V VL VS1 VS2 S1 S2 IN GND
+ 15 V V+ D1 D2 VO2 VO1
Logic Input
3V 50 % 0V VS1 VO1
90 %
Switch Output RL1 VRL 2 L2 CL2 CL1 Switch Output
0V VS2 VO2 0V
90 %
tD
tD
- 15 V CL (includes fixture and stray capacitance)
Figure 3. Break-Before-Make
+5V
+ 15 V
Rg
VL S IN
V+ D CL 10 nF VVO VO IN On
VO
Vg 3V
Off Q = VO x CL
On
GND
- 15 V
Figure 4. Charge Injection
www.vishay.com 8
Document Number: 70049 S-71155-Rev. H, 11-Jun-07
DG401/403/405
Vishay Siliconix
TEST CIRCUITS
C +5V C VL VS Rg = 50 0 V, 2.4 V IN S
V+
+5V
+ 15 V
C
+ 15 V C VL VS VO RL 100 RL 0.8 V GND VC Rg = 50 50 VO S2 S1 V+ D
D
IN
GND
V-
C
- 15 V VS VO C = RF bypass
- 15 V XTALK Isolation = 20 log C = RF bypass VS VO
Off Isolation = 20 log
Figure 5. Off Isolation
Figure 7. Crosstalk
+5V +5V C VL VS Rg = 50 0 V, 2.4 V IN GND VC GND - 15 V C = RF bypass RL 100 0 V, 2.4 V S V+ D VO + 15 V C C VL
+ 15 V C
V+
S Meter IN HP4192A Impedance Analyzer or Equivalent C f = 1 MHz
D V-
- 15 V
Figure 6. Insertion Loss
Figure 8. Capacitances
Document Number: 70049 S-71155-Rev. H, 11-Jun-07
www.vishay.com 9
DG401/403/405
Vishay Siliconix
APPLICATIONS
+5V + 15 V +5V VL Left Source 1 Right Left Source 2 Right S4 D4 S1 S3 IN1 S2 D2 Right TTL Integrate/ Reset V+ D1 ein D3 Left + 15 V
VL S1 S3 IN1
V+ D1 D3 + -
eout
C1 S2 S4 D2 D4 C2
IN2 TTL Channel Select GND
IN2
DG403
VSlope Select GND
DG403
V-
- 15 V
- 15 V
Figure 9. Stereo Source Selector
Figure 10. Dual Slope Integrator
Dual Slope Integrators: The DG403 is well suited to configure a selectable slope integrator. One control signal selects the timing capacitor C1 or C2. Another one selects ein or discharges the capacitor in preparation for the next integration cycle.
+5V VL S1 S3 IN1 + 15 V V+ D1 D3
Band-Pass Switched Capacitor Filter: Single-pole double-throw switches are a common element for switched capacitor networks and filters. The fast switching times and low leakage of the DG403 allow for higher clock rates and consequently higher filter operating frequencies.
ein
S2 S4
D2 D4
IN2 Clock GND
DG403
V-
- 15 V + eout
Figure 11. Band-Pass Switched Capacitor Filter
www.vishay.com 10
Document Number: 70049 S-71155-Rev. H, 11-Jun-07
DG401/403/405
Vishay Siliconix
APPLICATIONS
Peak Detector:
A3 acting as a comparator provides the logic drive for operating SW1. The output of A2 is fed back to A3 and compared to the analog input ein. If ein > eout the output of A3 is high keeping SW1 closed. This allows C1 to charge up to the analog input voltage. When ein goes below eout A3 goes negative, turning SW1 off. The system will therefore store the most positive analog input experienced.
Reset
SW2 SW1 R1 + A2 - eout
ein
- A1 +
+ A3 -
DG401
C1
Figure 12. Positive Peak Detector
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?70049.
Document Number: 70049 S-71155-Rev. H, 11-Jun-07
www.vishay.com 11
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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